1. Field of the Invention
The present invention relates to a method of demodulating an orthogonal frequency division multiplexing (hereinafter simply referred to as an OFDM)-modulated signal and a demodulation apparatus to which this demodulation method is applied, and particularly to a technology for use in demodulating an interleaved OFDM-modulated signal for depuncture processing.
2. Description of the Related Art
Heretofore, as one of various modulation systems for transmitting digital data of a relatively large capacity via radio waves, the OFDM-modulation is now commercially available.
FIG. 1 of the accompanying drawings is a block diagram showing an example of such a radio transmission. As shown in FIG. 1, for example, there is provided a video signal source 1 comprising a tuner for receiving a television broadcasting in a relatively small area such as home and office and a reproducing apparatus for playing back a video program recorded on a recording medium. A video signal (digital video data) outputted from a video signal source 1 is supplied to a radio transmission apparatus 2. The radio transmission apparatus 2 OFDM-modulates the video signal thus supplied to provide an OFDM-modulated signal, and this OFDM-modulated signal is supplied to an antenna 3, from which the OFDM-modulated signal is transmitted at a predetermined frequency band via radio waves. Then, the signal thus transmitted via radio waves is received by a radio reception apparatus 5 connected to an antenna 4. The radio reception apparatus 5 demodulates the OFMD waves of the received frequency band to provide a video signal. Then, the received video signal is supplied to a video recording/reproducing apparatus 6 and thereby recorded on a predetermined recording medium. Alternatively, the received video signal is supplied to a receiver 7 and thereby received and reproduced on a display of the receiver 7. In this case, the video signal recorded by the video recording/reproducing apparatus 6 may be reproduced and the reproduced signal may be supplied to the receiver 7, thereby being received and reproduced on the display of the receiver 7.
According to the above-mentioned arrangement, the OFDM-modulated signal is transmitted between the antenna 3 connected to the radio transmission apparatus 2 and the antenna 4 connected to the radio reception apparatus 5 via radio waves, whereby digital data of a large capacity can be efficiently transmitted via radio waves.
FIG. 2 is a block diagram showing an example of an arrangement for OFDM-modulating digital data so that such digital data may be efficiently transmitted from the radio transmission apparatus 2. As shown in FIG. 2, a transmission signal (digital data) supplied to an input terminal 2a is supplied to a serial-to-parallel (S/P) converter 2b, in which it is converted into parallel data at every predetermined unit. The parallel data thus converted by the S/P converter 2b is supplied to an interleave memory 2c, in which it is interleaved for changing data arrangement by changing the orders in which data is written in or read out from the interleave memory 2c. Then, the parallel data thus interleaved is supplied to an inverse fast Fourier transform circuit (simply referred to as an IFFT circuit) 2d, in which it is processed by the IFFT computation so that the orthogonal transform processing is effected to transform a time axis into a frequency axis. Then, the parallel data thus orthogonal-transformed is supplied to a parallel-to-serial (hereinafter simply referred to as a P/S) converter 2e, in which it is converted into serial data. The resultant serial data is supplied to an output terminal 2f. The data supplied to the output terminal 2f is supplied to a transmission processing system, not shown, in which it is frequency-converted into data of a predetermined transmission frequency band and transmitted via radio waves.
FIG. 3 is a block diagram showing an example of an arrangement for receiving and demodulating the OFDM-modulated signal received via radio waves by the radio reception apparatus 5. As shown in FIG. 3, a signal of a predetermined frequency band received at an antenna (not shown) and frequency-converted into an intermediate-frequency signal is supplied to an input terminal 5a. The data thus supplied to the input terminal 5a is supplied to a S/P converter 5b, in which it is converted into parallel data at every predetermined unit. The converted data is supplied to a fast Fourier transform circuit (hereinafter simply referred to as an FFT circuit) 5c, in which it is processed by the FFT computation so that the orthogonal transform processing is effected to transform a frequency axis into a time axis. The data thus orthogonal-transformed is supplied to a deinterleave memory 5d, in which it is deinterleaved for recovering the original data arrangement by changing the order in which data is written in or read out from the deinterleave memory 5d. The parallel data thus deinterleaved is supplied to a P/S converter 5e, in which it is converted into serial data. The resultant serial data is supplied to an output terminal 5f.
The circuit arrangement of FIG. 3 demodulates the OFDM-modulated signal at a timing shown in FIG. 4. Specifically, as shown in FIG. 4, this timing comprises an input period Ta in which data is inputted to the FFT circuit 5c, an FFT processing period Tb in which data is FFT-processed by the FFT circuit 5c, an output period Tc in which the data thus FFT-processed is outputted and a memory read period Td in which the data outputted during the output period Tc is written in the deinterleave memory 5dat the same time it is outputted and then the written data is read out from the deinterleave memory 5d.
The manner in which digital video data is interleaved and transmitted in the transmission processing shown in FIGS. 2 and 3 will be described with reference to FIGS. 5A, 5B and FIGS. 6A, 6B. As shown in FIG. 5A, for example, when digital video data is OFDM-modulated such that data of 50 units from data k=0 to k=49 are dispersed into subcarriers x.sub.0 to x.sub.49 and transmitted, if this signal is correctly received at the reception side, then there arises no problem. In this case, let it be assumed that subcarriers of data of data k=5, k=6, k=7 cannot be received correctly due to some defects such as a multipath fading as shown in FIG. 5B and data k=5, k=6, k=7 are lost.
At that time, when digital video data is not interleaved and then transmitted, as shown in FIG. 6A, data k=5, k=6, k=7 of consecutive three units within one slot are lost so that the burst error occurs. It is difficult to completely recover such burst error by an error-correction code or the like. When on the other hand digital video data is interleaved and then transmitted, as shown in FIG. 6B, for example, data k=5, k=6, k=7 of three units are dispersed and disposed within one slot (dispersed state becomes different depending upon the interleaved state) so that random errors occur. Therefore, respective random errors can be completely recovered by the error-correction code or the like.
In this manner, digital video data is interleaved and transmitted, whereby data can be suppressed from being lost on the reception side at minimum and a satisfactory transmission state can be maintained.
While the deinterleaving is executed by using the deinterleave memory 5din the arrangement shown in FIG. 3, there is known an arrangement in which a deinterleaving is executed without using a memory. FIG. 7 is a block diagram showing an example of such a case in which the deinterleaving is executed without using a memory. A circuit arrangement shown in FIG. 7 is the same as that of FIG. 3 until the data supplied to the input terminal 5a is supplied to the S/P converter 5b, in which it is converted into the parallel data at every predetermined unit and the converted output is supplied to the FFT circuit 5c, in which it is processed by the FFT computation so that the orthogonal transform processing is effected to transform the frequency axis into the time axis. Then, the orthogonal-transformed parallel data is rearranged by a distribution change processing 5g corresponding to the interleave pattern. The parallel data thus rearranged is supplied to the P/S converter 5e, in which it is converted into serial data. The resultant serial data is supplied to the output terminal 5f.
The arrangement shown in FIG. 7 demodulates the OFDM-modulated signal at a timing shown in FIG. 8. Specifically, as shown in FIG. 8, this timing comprises an input period Te in which data is inputted to the FFT circuit 5c, an FFT processing period Tf in which data is FFT-processed by the FFT circuit 5c and an output period Tg in which the data thus FFT-processed is outputted. According to the above-mentioned arrangement shown in FIG. 7, at the same time, the data is outputted from the FFT circuit 5c and supplied to the P/S converter 5e, the data is deinterleaved by the distribution change processing.
On the other hand, there is known a decimation processing called a puncture processing that is executed when a convolutional-coded signal is modulated as the OFMD-modulated signal. FIG. 9 is a block diagram showing an example of a conventional circuit arrangement for effecting the puncture processing. As shown in FIG. 9, transmission data a.sub.1 supplied to an input terminal 8a is convolutional-coded by a convolutional encoder 8b and thereby generated as data G.sub.1, G.sub.2 of two series. The resultant data G.sub.1, G.sub.2 of two series are supplied to and decimated by a decimation processing circuit 8c and thereby generated as puncture-processed encoded data b.sub.i. Here, when a coding rate at the convolutional encoder 8b is r=1/2, for example, a coding rate of the puncture-processed encoded data b.sub.i is r=3/4.
FIG. 10 is a block diagram showing an example of a convolutional encoder having a coding rate r=/2. As shown in FIG. 10, transmission data a.sub.1 supplied to an input terminal 9a is supplied to a shift register 9b. This shift register 9b is of such a three-stage shift register that data stored in the first stage and data stored in the third stage are supplied to and added by an adder 9c and thereby generated as data G.sub.1. Also, data stored in the first stage of the shift register 9b and data stored in the second stage are supplied to and added by an adder 9d and thereby generated as data G.sub.2.
FIGS. 11A to 11D are timing charts showing the manner in which the data G.sub.1, G.sub.2 of two series thus convolutional-coded are decimated. When data series a.sub.0, a.sub.1, a.sub.2 . . . , shown in FIG. 11A is inputted data a.sub.i, the convolutional-coded two series data G.sub.1, G.sub.2 become data g.sub.10, g.sub.11, g.sub.12 and data g.sub.20, g.sub.21, g.sub.22 . . . as shown in FIGS. 11B and 11C. Here, the decimation processing circuit 8c outputs data g.sub.10, g.sub.20, g.sub.21, g.sub.12 by using the data g.sub.10, g.sub.11, g.sub.12, g.sub.20, g.sub.21, g.sub.22, in that order, as shown in FIG. 11D. That is, the data g.sub.11, g.sub.22 are decimated as shown by crosses in FIGS. 11B, 11C. As a result, the data b.sub.i thus decimated becomes data convolutional-coded at the coding rate r=3/4.
Incidentally, when the data thus punctured is received and demodulated, there should be executed a depuncture processing for restoring the data thus decimated.
When the OFMD-modulated signal is demodulated, if the data is deinterleaved by using the deinterleave memory 5d as shown in FIG. 3, there is then the problem that the demodulation processing arrangement unavoidably is made complicated by the required deinterleave memory 5d. Also, with respect to the time required by the demodulation processing, a processing time T.sub.1 shown in FIG. 4 needs a demodulation processing time longer than the demodulation processing time required when data, which is not interleaved, is processed by the time necessary for reading out data from the deinterleave memory 5d. There is then the problem that it takes plenty of time for the demodulation processing.
As shown in FIG. 7, in the distribution change processing for the parallel data outputted from the FFT circuit, if the data is deinterleaved, then a processing time T.sub.2 shown in FIG. 8 is the same as the time required when data, which is not interleaved, is processed, and the processing time can be avoided from being extended. However, since the P/S converter 5e should be yet connected to the output section, there is then the problem that a circuit board in which the OFDM-modulated signal demodulation circuit is assembled becomes unavoidably large in size.
Also, when data is modulated, if data is punctured by using the convolutional encoder shown in FIG. 9, then upon demodulation, the depuncture processing for recovering decimated data is required. There is then the problem that the depuncture processing arrangement and the depuncture processing are complicated. That is, as shown in FIGS. 11A to 11D, a clock rate of data (FIG. 11A) which is not yet decimated and a clock rate of decimated data (FIG. 11D) are placed in a relationship of an integral multiple so that a clock of 3/4 of data clock fj, for example, is required for the processing. There is then the problem that such a clock generation processing becomes complicated. Further, since a processing for re-timing decimated data becomes necessary, it is unavoidable that a circuit scale becomes large in size and a power consumption becomes large. Furthermore, since clocks having different frequencies are used, a spurious radiation occurs to exert a bad influence upon high-frequency system circuit blocks for transmitting and receiving a signal via radio waves. As such bad influence, there are known a deterioration of a reception performance and an occurrence of radiation disturbance of out-of-band spurious radio waves.